In a communication system, a digital to analog converter (DAC) is used at a transmitter and an analog to digital converter (ADC) is used at a receiver. A sampling clock at the DAC is controlled by an oscillator, while a sampling clock at the ADC is controlled by another oscillator. Due to the mismatch of the two oscillators, there is usually a sampling clock offset (SCO) between the receiver and transmitter. The SCO will degrade the performance of a communication system which is sensitive to time offset.
Accordingly, a system and method are needed to compensate for SCO.